The invention relates to microelectronics process techniques and, more particularly, to the formation of polysilicon-to-substrate contacts.
In conventional conductor-insulator-semi-conductor processing for forming polysilicon-to-substrate contacts, a layer of polysilicon is formed over the contact region of a monocrystalline silicon substrate and etched to shape, then the contact region is doped through the resulting polysilicon conductor. As a consequence of etching the polysilicon to define the conductor, the silicon substrate is unavoidably attacked by the etchant. The resulting damage to the substrate increases the leakage current of the junction formed in the polysilicon-to-substrate contact region.
FIG. 1 is a planar view, in schematic form, showing the relationship of the various masks used in conventional processing of polysilicon-to-silicon substrate contacts. The gate dielectric layer 8 is originally formed on substrate 9 within field oxide 10 (see FIG. 2) to correspond to mask window outline 11. A mask having window outline 12 is then formed over the gate dielectric layer 8 and the dielectric 8 is etched to form the contact opening 13 illustrated in the FIG. 2 cross-sectional view. A polysilicon layer is next deposited and etched using a mask having window outlines 14 and 15 to form conductor 16 and gate electrode 17. The conductor 16 terminates over and contacts the surface of region 18, which is this special case is the FET source or drain region. More generally, region 18 may be any substrate circuit component to which polysilicon contact is made.
In forming the polysilicon conductor 16, the surface of substrate region 18 is etched by the polysilicon (polycrystalline silicon) etchant once the polysilicon surrounding the conductor is removed. The polysilicon etchant causes pitting and cracking of the surface of region 18. In subsequent processing, the substrate region 18 is doped with an impurity such as phosphorus. The polysilicon conductor is in place during the diffusion process so that, by diffusing through the conductor, ohmic contact is made between the conductor 16 and the diffused region 18. However, the leakage current at the junction of the polysilicon and the substrate is higher than that for an equivalent metal-to-substrate contact. The increased leakage current results from the damage incurred in the contact region during the polysilicon etching step, especially that at the boundary 19 between the polysilicon and the substrate region 18.
The increased leakage current occurs in both p-type and n-type contacts. Minimizing the junction leakage current is especially important whenever a precharged junction region must be held at a given potential for a set period of time. This situation is characteristic of dynamic circuits, but can also occur during the operation of static circuits.